Efficient Processing of Deep Neural Networks. Vivienne Sze

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       Efficient Processing of Deep Neural Networks

       Synthesis Lectures on Computer Architecture

      Editors

       Natalie Enright Jerger, University of Toronto

       Margaret Martonosi, Princeton University

      Founding Editor Emeritus

       Mark D. Hill, University of Wisconsin, Madison

      Synthesis Lectures on Computer Architecture publishes 50- to 100-page publications on topics pertaining to the science and art of designing, analyzing, selecting and interconnecting hardware components to create computers that meet functional, performance and cost goals. The scope will largely follow the purview of premier computer architecture conferences, such as ISCA, HPCA, MICRO, and ASPLOS.

      Efficient Processing of Deep Neural Networks

      Vivienne Sze, Yu-Hsin Chen, Tien-Ju Yang, and Joel S. Emer

      2020

      Quantum Computer Systems: Research for Noisy Intermediate-Scale Quantum Computers

      Yonshan Ding and Frederic T. Chong

      2020

      A Primer on Memory Consistency and Cache Coherence, Second Edition

      Vijay Nagarajan, Daniel J. Sorin, Mark D. Hill, and David A. Wood

      2020

      Innovations in the Memory System

      Rajeev Balasubramonian

      2019

      Cache Replacement Policies

      Akanksha Jain and Calvin Lin

      2019

      The Datacenter as a Computer: Designing Warehouse-Scale Machines, Third Edition

      Luiz André Barroso, Urs Hölzle, and Parthasarathy Ranganathan

      2018

      Principles of Secure Processor Architecture Design

      Jakub Szefer

      2018

      General-Purpose Graphics Processor Architectures

      Tor M. Aamodt, Wilson Wai Lun Fung, and Timothy G. Rogers

      2018

      Compiling Algorithms for Heterogenous Systems

      Steven Bell, Jing Pu, James Hegarty, and Mark Horowitz

      2018

      Architectural and Operating System Support for Virtual Memory

      Abhishek Bhattacharjee and Daniel Lustig

      2017

      Deep Learning for Computer Architects

      Brandon Reagen, Robert Adolf, Paul Whatmough, Gu-Yeon Wei, and David Brooks

      2017

      On-Chip Networks, Second Edition

      Natalie Enright Jerger, Tushar Krishna, and Li-Shiuan Peh

      2017

      Space-Time Computing with Temporal Neural Networks

      James E. Smith

      2017

      Hardware and Software Support for Virtualization

      Edouard Bugnion, Jason Nieh, and Dan Tsafrir

      2017

      Datacenter Design and Management: A Computer Architect’s Perspective

      Benjamin C. Lee

      2016

      A Primer on Compression in the Memory Hierarchy

      Somayeh Sardashti, Angelos Arelakis, Per Stenström, and David A. Wood

      2015

      Research Infrastructures for Hardware Accelerators

      Yakun Sophia Shao and David Brooks

      2015

      Analyzing Analytics

      Rajesh Bordawekar, Bob Blainey, and Ruchir Puri

      2015

      Customizable Computing

      Yu-Ting Chen, Jason Cong, Michael Gill, Glenn Reinman, and Bingjun Xiao

      2015

      Die-stacking Architecture

      Yuan Xie and Jishen Zhao

      2015

      Single-Instruction Multiple-Data Execution

      Christopher J. Hughes

      2015

      Power-Efficient Computer Architectures: Recent Advances

      Magnus Själander, Margaret Martonosi, and Stefanos Kaxiras

      2014

      FPGA-Accelerated Simulation of Computer Systems

      Hari Angepat, Derek Chiou, Eric S. Chung, and James C. Hoe

      2014

      A Primer on Hardware Prefetching

      Babak Falsafi and Thomas F. Wenisch

      2014

      On-Chip Photonic Interconnects: A Computer Architect’s Perspective

      Christopher J. Nitta, Matthew K. Farrens, and Venkatesh Akella

      2013

      Optimization and Mathematical Modeling in Computer Architecture

      Tony Nowatzki, Michael Ferris, Karthikeyan Sankaralingam, Cristian Estan, Nilay Vaish, and David Wood

      2013

      Security Basics for Computer Architects

      Ruby B. Lee

      2013

      The Datacenter as a Computer: An Introduction to the Design of Warehouse-Scale Machines, Second Edition

      Luiz André Barroso, Jimmy Clidaras, and Urs Hölzle

      2013

      Shared-Memory Synchronization

      Michael L. Scott

      2013

      Resilient Architecture Design for Voltage Variation

      Vijay Janapa Reddi and Meeta Sharma Gupta

      2013

      Multithreading Architecture

      Mario Nemirovsky and Dean M. Tullsen

      2013

      Performance Analysis and Tuning for General Purpose Graphics Processing Units (GPGPU)

      Hyesoon Kim, Richard Vuduc, Sara Baghsorkhi, Jee Choi, and Wen-mei Hwu

      2012

      Automatic Parallelization: An Overview of Fundamental Compiler Techniques

      Samuel P. Midkiff

      2012

      Phase Change Memory: From Devices to Systems

      Moinuddin K. Qureshi, Sudhanva Gurumurthi, and Bipin Rajendran

      2011

      Multi-Core Cache Hierarchies

      Rajeev Balasubramonian, Norman P. Jouppi, and Naveen Muralimanohar

      2011

      A Primer on Memory Consistency and Cache Coherence

      Daniel J. Sorin, Mark D. Hill, and David A. Wood

      2011

      Dynamic